Acer Aspire 7741G_Wistron_JE70-CP_Rev-1M.pdf

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5
4
3
2
1
JE70-CP Block Diagram
D
Clock Generator
ICS9LRS3197AKLFT
3
DDRIII
Slot 0
20
800/1066/1333
DDRIII
Slot 1
21
800/1066/1333
DDRIII
Slot 2
22
800/1066/1333
Project code: 91.4HN01.001
PCB P/N
: 48.4HN01.0SD
REVISION
: 09923_-1M
SYSTEM DC/DC
RT8223
INPUTS
DCBATOUT
OUTPUTS
5V_S5
3D3V_S5
47
DDRII Channel A
DDR II Channel B
Arrandale
Clarksfield
4,5,..,9,10
Intel CPU
Madison
PCI EXPRESS GRAPHIC
RGB CRT
CRT
LCD
WXGA+
HDMI
24
SYSTEM DC/DC
RT8209E
23
D
LVDS 1CH
INPUTS
DCBATOUT
OUTPUTS
1D5V_S3
48
X16
ATI
22
DDR II Channel B
Digital Display
25
FDIx8
DMIx4
WEBCAM
SYSTEM DC/DC
RT8209B
INPUTS
23
DCBATOUT
1D05V_S0
49
OUTPUTS
Mini-Card
WLAN
37
PCIE+USB 2.0
INTEL
PCH
C
BLUETOOTH
28
USB 2.0
SYSTEM DC/DC
TPS51611
INPUTS
DCBATOUT
RJ45
CONN
Giga LAN
31
14 USB 2.0/1.1 ports
PCIE
30
USB x1
29
OUTPUTS
C
ETHERNET
(10/100/1000Mb)
GFX_CORE
52
BCM57780
High Definition Audio
6 SATA ports
8 PCIE ports
ACPI 1.1
LPC I/F
CPU DC/DC
USB x 2
TPS51621
INPUTS
DCBATOUT
OUTPUTS
VCC_CORE
45,46
MIC IN
INT MIC
HD AUDIO
CODEC
ALC272
32
AZALIA
PCI/PCI BRIDGE
Card Reader
AU6437
SD/MMC
MS/MS Pro/xD
MAXIM CHARGER
LINE OUT
SATA
SATA HDD
26
BQ24745
INPUTS
DCBATOUT
OUTPUTS
BT+
51
B
B
OP AMP
G1454
33
11,12,...,18,19
SPI
SATA ODD
27
PCB STACKUP
TOP
GND
LPC Bus
LPC debug
40
Flash ROM
4MB
40
S
S
2CH SPEAKER
SPI
KBC
ENE3930
39
GND
BOTTOM
A
Pre UMA
A
Flash ROM
128KB
40
Thermal
Sensor
38
G792
Wistron Corporation
Touch
PAD
41
Int.
KB
39
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU FAN
5
4
3
2
Block Diagram
Size
A3
Date:
Document Number
Rev
JE70-CP
Tuesday, February 02, 2010
Sheet
1
-1M
1
of
67
PCH Strapping
Name
SPKR
A
B
Schematics Notes
Processor Strapping
Pin Name
CFG[4]
C
D
Default
Value
1
E
Strap Description
Embedded
DisplayPort
Presence
PCI-Express Static
Lane Reversal
PCI-Express
Configuration
Select
Reserved -
Temporarily used
for early
Clarksfield
samples.
Reboot option at power-up
Default Mode:
Internal weak Pull-down.
No Reboot Mode with TCO Disabled:
Connect to Vcc3_3 with 8.2-k
- 10-k weak pull-up resistor.
Weak internal pull-down. Do not pull high.
Default Mode:
Internal pull-up.
Low (0) = Top Block Swap Mode
(Connect to ground with 4.7-k
pull-down resistor).
Configuration (Default value for each bit is
1 unless specified otherwise)
1:
Disabled - No Physical Display Port attached to
Embedded DisplayPort.
0:
Enabled - An external Display Port device is
connected to the Embedded Display Port.
1:
Normal Operation.
0:
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
1:
Single PCI-Express Graphics
0:
Bifurcation enabled
Clarksfield (only for early samples pre-ES1)
-
Connect to GND with 3.01K Ohm/5% resistor
Note:
Only temporary for early CFD samples
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.
4
INIT3_3V#
GNT3#/
GPIO55
INTVRMEN
GNT0#,
GNT1#
CFG[3]
weak
CFG[0]
1
4
1
High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Default (SPI):
Left both GNT0# and GNT1# floating. No pull up
required.
Boot from PCI:
Connect GNT1# to ground with 1-k pull-down
resistor. Leave GNT0# Floating.
Boot from LPC:
Connect both GNT0# and GNT1# to ground with 1-k
pull-down resistor.
Default - Internal pull-up.
Low (0)
= Configures DMI for ESI compatible operation (for servers
only. Not for mobile/desktops).
Default:
Do not pull low.
Disable ME in Manufacturing Mode:
Connect to ground with 1-k
pull-down resistor.
Enable iTPM:
Connect to Vcc3_3 with 8.2-k weak pull-up resistor.
Disable iTPM:
Left floating, no pull-down required.
Enable Danbury:
Connect to Vcc3_3 with 8.2-k weak pull-up
resistor.
Disable Danbury:
Connect to ground with 4.7-k weak pull-down
resistor.
Weak internal pull-up. Do not pull low.
Low (0):
Flash Descriptor Security will be overridden.
High (1) :
Flash Descriptor Security will be in effect.
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
CFG[7]
0
GNT2#/
GPIO53
GPIO33
3
SPI_MOSI
NV_ALE
3
NC_CLE
HAD_DOCK_EN#
/GPIO[33]
HDA_SDO
HDA_SYNC
GPIO15
GPIO8
GPIO27
2
PCIE Routing
LANE1
LANE2
LANE3
LAN
MiniCard1
MiniCard2
USB Table
Pair
0
1
2
3
4
5
6
7
8
9
10
Device
USB3
USB2
USB4
MINICARD1
WECAM
Touch Panel
NC
NC
NC
USB1(HS)
Finger Print
Blue Tooth
MINIC2
Cardreader
Title
Pre UMA
2
1
11
12
13
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Table of Content
Size
A3
Date:
Document Number
Rev
JE70-CP
Tuesday, February 02, 2010
Sheet
2
of
67
-1M
A
B
C
D
E
1D5V_S0_CLKGEN
-1M 0127
1D5V_S0
R626
1
0R3J-0-U-GP
R269
3D3V_S0
4
1D5V_S0_CLKGEN
1
1
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C736
C345
2
2
2
1D05V_S0
1
R242
2
0R0603-PAD
3D3V_S0
4
1
Do Not Stuff
2
1D5V_S0_CLKGEN
DY
1
1
1
1
1
1
1
1
1
R273
2
0R0603-PAD
3D3V_CK505
C746
Do Not Stuff
RN
C744
SC1U10V2ZY-GP
3D3V_CK505_IO
C339
Do Not Stuff
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
C745
C737
C338
C340
C341
SC1U10V2ZY-GP
R243
1
Do Not Stuff
2
DY
2
2
2
2
2
2
2
DY
DY
2
DY
DY
VGA_XIN1_L
1
2
Do Not Stuff
24
17
29
15
U65
VDDCPU_3_3
VDDSRC_3_3
VDDREF_3_3
VDDDOT96MHZ_3_3
VDDSRC_IO
VDD_27MHZ
VDDCPU_IO
18
1
5
DY
EC56
SB 1118
6
7
16
25
30
28
27
31
32
VGA_XIN1_L
OSC_SPREAD_L
R633
1
2
Do Not Stuff
TP117
CPU_STOP#
R241
1
CLK_EN
FSC
R258
1
GEN_XTAL_IN
GEN_XTAL_OUT
12
12
12
12
DREFCLK#
DREFCLK
CLKIN_DMI#
CLKIN_DMI
4
0R4P2R-PAD
3
4
0R4P2R-PAD
3
4
0R4P2R-PAD
3
1
2
RN82
RN
DREFCLK#_R
DREFCLK_R
CLKIN_DMI#_R
CLKIN_DMI_R
CLK_PCIE_SATA#_R
CLK_PCIE_SATA_R
CLK_CPU_BCLK#_R
CLK_CPU_BCLK_R
4
3
14
13
11
10
22
23
19
20
DOT96C_LPR
DOT96T_LPR
SRCC1_LPR
SRCT1_LPR
SATAC_LPR
SATAT_LPR
CPUC0_LPR
CPUT0_LPR
27MHZ_NONSS
27MHZ_SS
CPU_STOP#
CLKPWRGD/PD#_3_3
REF_3L/FSLC_3_3
X1
X2
GNDDOT96MHZ
SDATA_3_3
SCLK_3_3
GNDSATA
1
JTAG_TCK 59
3D3V_S0
ATI_ES
1
2
1
2
2
1
RN
2
10KR2J-3-GP
2
33R2J-2-GP
1
CLK_ICH14 12
3
RN78
RN80
0R4P2R-PAD
3
RN77
4
RN
3
12 CLK_PCIE_SATA#
12 CLK_PCIE_SATA
12 CLK_CPU_BCLK#
12 CLK_CPU_BCLK
DY
PCH_SMBDATA 12,20,21,22
PCH_SMBCLK 12,20,21,22
C344
Do Not Stuff
33
26
21
71.93197.003
2ND = 71.93197.B03
12
-1M 0127
2
8
9
ICS9LRS3197AKLFT-GP-U
GND27MHZ
CPUC1_LPR
CPUT1_LPR
GNDCPU
GNDSRC
GNDREF
GND
2
PCH_SMBDATA
PCH_SMBCLK
DY
1
ECT7
1
ECT8
2
Do Not Stuff
DY
2
Do Not Stuff
3D3V_S0
2
2
2
10KR2J-3-GP
R627
SC12P50V2JN-3GP
C743
1D05V_VTT
GEN_XTAL_IN
FSC
SPEED
2
R256
0
133MHz
(Default)
1
CLK_EN
1
2
1
1
100MHz
D
Q6
X6
X-14D31818M-50GP
R629
Do Not Stuff
.
.
. .
.
G
S
2N7002E-1-GP
DY
2
GEN_XTAL_OUT
DY
Do Not Stuff
1
2
1
2
C740
SC12P50V2JN-3GP
2ND = 82.30005.901
GEN_XTAL_OUT_R
1
R628
2
0R0402-PAD
82.30005.A51
FSC
84.2N702.D31
R261
2K2R2J-2-GP
1
2ND = 84.2N702.E31
VR_CLKEN# 45
1
2
1
Pre UMA
1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
Clock Generator
Size
A3
Date:
A
B
C
D
Document Number
Rev
JE70-CP
Tuesday, February 02, 2010
Sheet
E
-1M
3
of
67
5
4
3
2
1
D
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
CPU1A
1 OF 9
R489
CLARKSFIELD
A24
C23
B22
A21
B24
D23
B23
A22
D24
G24
F23
H23
D25
F24
E23
G23
DMI_RX#0
DMI_RX#1
DMI_RX#2
DMI_RX#3
DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3
DMI_TX#0
DMI_TX#1
DMI_TX#2
DMI_TX#3
DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
B26
A26
B27
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_IRCOMP_R
EXP_RBIAS
PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
PEG_TXN15_L
PEG_TXN14_L
PEG_TXN13_L
PEG_TXN12_L
PEG_TXN11_L
PEG_TXN10_L
PEG_TXN9_L
PEG_TXN8_L
PEG_TXN7_L
PEG_TXN6_L
PEG_TXN5_L
PEG_TXN4_L
PEG_TXN3_L
PEG_TXN2_L
PEG_TXN1_L
PEG_TXN0_L
PEG_TXP15_L
PEG_TXP14_L
PEG_TXP13_L
PEG_TXP12_L
PEG_TXP11_L
PEG_TXP10_L
PEG_TXP9_L
PEG_TXP8_L
PEG_TXP7_L
PEG_TXP6_L
PEG_TXP5_L
PEG_TXP4_L
PEG_TXP3_L
PEG_TXP2_L
PEG_TXP1_L
PEG_TXP0_L
1
R491
2
49D9R2F-GP
2
750R2F-GP
PEG_RXN[15..0] 58
D
1
DMI
DMI
PEG_RXP[15..0] 58
C
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
E22
D21
D19
D18
G21
E19
F21
G18
D22
C21
D20
C18
G22
E20
F20
G19
F17
E17
C17
F18
D17
FDI_TX#0
FDI_TX#1
FDI_TX#2
FDI_TX#3
FDI_TX#4
FDI_TX#5
FDI_TX#6
FDI_TX#7
FDI_TX0
FDI_TX1
FDI_TX2
FDI_TX3
FDI_TX4
FDI_TX5
FDI_TX6
FDI_TX7
FDI_FSYNC0
FDI_FSYNC1
FDI_INT
FDI_LSYNC0
FDI_LSYNC1
C
Intel(R) FDI
PCI EXPRESS -- GRAPHICS
13 FDI_FSYNC0
13 FDI_FSYNC1
13 FDI_INT
13 FDI_LSYNC0
13 FDI_LSYNC1
RN12
4
3
1
FDI_FSYNC1
2
FDI_LSYNC1
Do Not Stuff
1
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
1
DIS_PX
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
C521
C533
C526
C543
C541
C547
C553
C557
C562
C571
C574
C579
C581
C583
C587
C589
C523
C538
C531
C550
C546
C551
C556
C559
C569
C573
C577
C580
C582
C586
C588
C592
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
PEG_TXN[15..0] 58
B
4
3
DIS_ONLY
DIS_ONLY
RN10
R159
Do Not Stuff
PEG_TXP[15..0] 58
B
1
2
Do Not Stuff
FDI_LSYNC0
FDI_FSYNC0
DIS_ONLY
For Graphics Disable , Pull-down to
GND via 1-k ± 5% resistor
CLARKUNF
2
2ND = 62.10055.321
62.10053.561
A
Pre UMA
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
CPU (1/7)
Size
A3
Date:
Document Number
Rev
JE70-CP
Tuesday, February 02, 2010
Sheet
4
of
67
-1M
5
1D05V_VTT
4
CPU1B
3
2 OF 9
2
1
1
R492
2
20R2F-GP
H_COMP3
H_COMP2
20R2F-GP
H_COMP1
49D9R2F-GP
H_COMP0
49D9R2F-GP
AT23
AT24
G16
AT26
AH24
COMP3
COMP2
COMP1
COMP0
SKTOCC#
CATERR#
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
1
R529
2
49D9R2F-GP
H_CATERR#
R488
PROCHOT#
68R2-GP
R160
R486
1
1
1
2
2
2
A16
B16
AR30
AT30
E16
D16
A18
A17
BCLK_CPU_P
BCLK_CPU_N
BCLK_CPU_P 16
BCLK_CPU_N 16
1
R147
2
CLARKSFIELD
CLOCKS
MISC
MISC
D
H_CATERR#
PEG_CLK_R
PEG_CLK#_R
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK_R 12
PEG_CLK#_R 12
DPLL_REF_SSCLK 12
DPLL_REF_SSCLK# 12
SM_RCOMP_0
1
R548
SM_RCOMP_1
1
R545
SM_RCOMP_2
1
R541
2
100R2F-L1-GP-U
D
24D9R2F-L-GP
AK14
2
2
130R2F-1-GP
THERMAL
THERMAL
16 H_PECI
AT15
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
PM_EXT_TS#0
PM_EXT_TS#1
F6
AL1
AM1
AN1
AN15
AP15
SM_DRAMRST# 16
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
PECI
1D05V_VTT
RN61
SRN10KJ-5-GP
1
4
2
3
45 H_PROCHOT#
R146
1
DY
2
Do Not Stuff
PROCHOT#
AN26
PROCHOT#
PM_EXTTS#0_R 20
PM_EXTTS#1_R 21,22
16,43 PM_THRMTRIP-A#
AK15
THERMTRIP#
DDR3
MISC
RN
PRDY#
PREQ#
TCK
TMS
TRST#
TDI
TDO
TDI_M
TDO_M
DBR#
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
AT28
AP27
AN28
AP28
AT27
AT29
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_TDI_M
XDP_TDO_M
1
TP40 TPAD14-GP
DPLL_REF_SSCLK
1
0R4P2R-PAD
DPLL_REF_SSCLK#
2
RN11
4
3
TPAD14-GP
TP45
1
H_CPURST#
AP26
AL15
RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD
RSTIN#
PWR MANAGEMENT
PWR MANAGEMENT
13 H_PM_SYNC
16,43,56 H_PW RGD
C
1
R520
2
0R0402-PAD
VCCPW RGOOD_1
R519
2
0R0402-PAD
R247
2
0R0402-PAD
VCCPW RGOOD_0
DRAMPW ROK
AN14
AN27
AK13
AM15
JTAG & BPM
XDP_DBRESET#
C
1
1
13 PM_DRAM_PW RGD
49 H_VTTPW RGD
TPAD14-GP
R524
1
TP44
1
H_PW RGD_XDP
PLT_RST#_R
AM26
AL14
15,30,31,37,39,40,43,56,58
PLT_RST#
2
1K5R2F-2-GP
1
R526
750R2F-GP
CLARKUNF
2ND = 62.10055.321
62.10053.561
R255
PM_DRAM_PW RGD
1
2
Do Not Stuff
PM_DRAM_PW RGD_1
B
1D5V_S0_DDR
S3
1D5V_S0_DDR
2
B
CPU JTAG
3D3V_S0
1
1
1D05V_VTT
R252
Do Not Stuff
XDP_TMS
R481
XDP_TDI
R478
XDP_PREQ#
R485
XDP_TDO
R254
Do Not Stuff
XDP_TCLK
R145
XDP_TRST#
R484
R482
NON-S3
2
R246
1K1R2F-GP
DY
2
1
1
1
1
DY
DY
DY
2
Do Not Stuff
XDP_DBRESET#
XDP_TDO_M
2
Do Not Stuff
Do Not Stuff
1
R148
2
1KR2J-1-GP
1
2
1
R143
0R0402-PAD
XDP_TDI_M
DRAMPW ROK
R245
3KR2F-GP
PM_DRAM_PW RGD
2
2
51R2J-2-GP
NON-S3
2
S3
1
1
1
DY
2
Do Not Stuff
2
51R2J-2-GP
3D3V_S5
A
U18
43,50 1D5V_S0_PW RGD
2
1
2
3
Pre UMA
B
A
A
S3
VCC
Y
5
4
PM_DRAM_PW RGD_1
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Title
GND
Do Not Stuff
Do Not Stuff
CPU (2/7)
Size
A3
Date:
Document Number
Rev
JE70-CP
Tuesday, February 02, 2010
Sheet
5
of
67
-1M

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