RFIC BCM2091 //overwrite parm_dsp.txt AGC_LOOP_TARGET AGC_LOOP_TARGET 1024//1125 // Target automatic gain control loop. This is the ideal absolute power level to enter the ADC // NXP 4228 Target is 3277 peak digital on I and Q // DSPpower = 16 * 10 log (I^2 + Q^2) = 16 * 10 log (Ipk^2) // = 16 * 10 log (3277^2) = 1125 RX_RF_TIME 6 //Time to next event (Qbits) RX_RF1_TIME 3 //Time to next event (Qbits) RX_AFC_TIME 3 RX_ACTION_TIME 3 //Time to next event (Qbits) RX_AGC_TIME 3 //Time to next event (Qbits) RX_SHUTDOWN_TIME 202 //176 RX_IF_TIME 3 //Time to next event (Qbits) RX_RF_INIT_TIME 9 //3*3 RX_ACTION_SEQ RXINIT AGC AGC2 AFC RF ACTION RX_START_DELAY 182 RX_STOP_DELAY 5 TX_RF_TIME 6 //Time to next event (Qbits) TX_RF1_TIME 3 //Original was 183. Changed to 5 for 2091A1 to use as multislot indication reg write event TX_AFC_TIME 3 //Time to next event (Qbits) TX_ACTION_TIME 246 //60+183 (to compensate for removal of RF1 in TX_ACTION_SEQ) TX_IF_TIME 3 //3 TX_AGC_TIME 3 //Not used TX_PUPEV_TIME 3 //65 TX_PDNEV_TIME 3 //Not used TX_RF_INIT_TIME 9 //3*3 TX_SHUTDOWN_TIME 243 //Delay from TXSM on (ACTION) to shutdown event = ACTION+TXPLL+PUPEV+@ = 246+3+4+@ = 243 (@ is -10) (event will occur at 243+625 after TXSM on) TX_INTRSLOTRDN_TIME 100 //Not used. TX_INTRSLOTRUP_TIME 238 //Delay from TXSM on (ACTION) to interslot ramp event = ACTION+TXPLL+PUPEV+@ = 246+3+4+@ = 238 (@ is -15) (event will occur at 238+625 after TXSM on) TX_GMSK_INTRSLOTUP_ADJUST 0 //Used to adjust tx gain write in case of mixed mode 8-G TX_GMSK_INTRSLOTDN_ADJUST 10 //Not used. TX_GMSK_RAMPDN_TIME 30 //Not used. No longer used for 2091. Included in TX_SHUTDOWN_TIME TX_ACTION_SEQ TXINIT RF ACTION TXPLL PUP_EV SHUTDOWN TX_2SLOT_ACTION_SEQ TXINIT RF ACTION TXPLL PUP_EV INTRSLOTRUP SHUTDOWN TX_3SLOT_ACTION_SEQ TXINIT RF ACTION TXPLL PUP_EV INTRSLOTRUP INTRSLOTRUP SHUTDOWN TX_4SLOT_ACTION_SEQ TXINIT RF ACTION TXPLL PUP_EV INTRSLOTRUP INTRSLOTRUP INTRSLOTRUP SHUTDOWN TX_START_DELAY 308//318 //311 TX_STOP_DELAY 5 //Control start time of MON relative to TX burst end MON_RF_TIME 6 //Time to next event (Qbits) MON_AFC_TIME 3 //Time to next event (Qbits) MON_ACTION_TIME 3 //Time to next event (Qbits) MON_AGC_TIME 3 //Time to next event (Qbits) MON_SHUTDOWN_TIME 202 MON_IF_TIME 3 //Time to next event (Qbits) MON_ACTION_SEQ RXINIT AGC AGC2 RF ACTION MON_START_DELAY 182 MON_STOP_DELAY 5 //Note 4 slot Tx + Rx + Mon = 40 SMC events. No more can be added without removing others first. #if defined(INCLUDE_DCXO_MULTI_SEG)||defined(INCLUDE_DCXO_TEMP_COMP) FDAC_RELATIVE_VAL0 -3000 FDAC_RELATIVE_VAL1 -1500 FDAC_RELATIVE_VAL2 1500 FDAC_RELATIVE_VAL3 3000 #endif #if defined(INCLUDE_DCXO_TEMP_COMP) // index temp min mid max XO_TEMP_PROFILE 0 -300 -163840 -163840 -163840 //-2.5 ppm XO_TEMP_PROFILE 1 -250 -16384 -16384 -16384 //-0.25 ppm XO_TEMP_PROFILE 2 -200 131072 131072 131072 //2 ppm XO_TEMP_PROFILE 3 -150 229376 229376 229376 //3.5 XO_TEMP_PROFILE 4 -100 294912 294912 294912 //4.5 XO_TEMP_PROFILE 5 -50 353894 353894 353894 //5.4 XO_TEMP_PROFILE 6 0 327680 327680 327680 //5 XO_TEMP_PROFILE 7 50 294912 294912 294912 //4.5 XO_TEMP_PROFILE 8 100 262144 262144 262144 //4 XO_TEMP_PROFILE 9 150 176947 176947 176947 //2.7 XO_TEMP_PROFILE 10 200 124518 124518 124518 //1.9 XO_TEMP_PROFILE 11 250 0 0 0 XO_TEMP_PROFILE 12 300 -65536 -65536 -65536 //-1 XO_TEMP_PROFILE 13 350 -163840 -163840 -163840 //-2.5 XO_TEMP_PROFILE 14 400 -209715 -209715 -209715 //-3.2 XO_TEMP_PROFILE 15 450 -281804 -281804 -281804 //-4.3 XO_TEMP_PROFILE 16 500 -327680 -327680 -327680 //-5 XO_TEMP_PROFILE 17 550 -340787 -340787 -340787 //-5.2 XO_TEMP_PROFILE 18 600 -327680 -327680 -327680 //-5 XO_TEMP_PROFILE 19 650 -288358 -288358 -288358 //-4.4 XO_TEMP_PROFILE 20 700 -249036 -249036 -249036 //-3.8 XO_TEMP_PROFILE 21 750 -144179 -144179 -144179 //-2.2 XO_TEMP_PROFILE 22 800 0 0 0 XO_TEMP_PROFILE 23 850 196608 196608 196608 //3 #endif //***************************************************************************** // Set up RFIC RX and TX Burst. //***************************************************************************** RF_GSM850_RXIF 0x0013000 //0x001200 // Set GSM850 Rx events RF_GSM850_GMSK_TXIF 0x0013000 // Set GSM850 Tx set up RF_GSM850_8PSK_TXIF 0x0013000 // Set GSM850 Tx set up RF_GSM_RXIF 0x0013000 //0x001200 // Set GSM Rx events RF_GSM_GMSK_TXIF 0x0013000 // Set GSM Tx set up RF_GSM_8PSK_TXIF 0x0013000 // Set GSM Tx set up RF_DCS_RXIF 0x0013000 //0x001200 // Set DCS Rx events RF_DCS_GMSK_TXIF 0x0013000 // Set DCS Tx set up RF_DCS_8PSK_TXIF 0x0013000 // Set DCS set up RF_PCS_RXIF 0x0013000 //0x001200 // Set DCS Rx events RF_PCS_GMSK_TXIF 0x0013000 // Set PCS Tx set up RF_PCS_8PSK_TXIF 0x0013000 // Set PCS set up RF_TXIFRAMPUP_GMSK 0x5a4000 // DigBkoff: max; TxGainPtr: index 0 RF_TXIFRAMPUP_8PSK 0x5aC000 // 0x5a8000 // not used for 2091B0 // 0x143 -4.0 dB low band // 0x0f2 -6.5 dB high band #ifdef tempINTERFACE_MobC00121082 RF_8PSK_DIG_ATTEN0_LB 0x05aa860 //0x143 // -4.0 dBm RF_8PSK_DIG_ATTEN1_LB 0x05aa020 //0x101 // -6.0 dBm RF_8PSK_DIG_ATTEN0_HB 0x05a9e40 //0x0f2 // -6.5 dBm RF_8PSK_DIG_ATTEN1_HB 0x05a9800 //0x0c0 // -8.5 dBm #else RF_8PSK_DIG_ATTEN0 0x05ac000 //0x4620200 //0x46203ff RF_8PSK_DIG_ATTEN1 0x05aad40 //0x462016A //0x46202d4 #endif RF_TXPUP_EV 0x05a0000 RF_TXPDN_EV 0x05a0000 // bit[14:5](DigBkoff or RampDn) = 0 RF_MSTXPUP_EV 0x4380000 // not used for 2091B0 #ifdef MRSSI //***************************************************************************** // MRSSI AGC selection parameters //***************************************************************************** MRSSI_RFIC_REG_ADDRESS 0x20 MRSSI_AGC_SWITCH_THRESH 128 // value unknown yet MRSSI_AGC_HYSTERESIS_TH 16 // value unknown yet MRSSI_AGC_HYSTERESIS_CNT_MAX 4 // value unknown yet #endif //DigRF DSP_DIG_DRFMODECTRL0 0xc010 //0xc000 //0x8000 //GMSK 1 block mode 0-stream mode DSP_DIG_DRFLPM0 0x1620 //0x2020 // preamble and posamble - in digRF bits DSP_DIG_DRFPREH0 0x0//FFFF DSP_DIG_DRFPREL0 0x0//FFFF DSP_DIG_DRFPOSH0 0x0//FFFF DSP_DIG_DRFPOSL0 0x0//FFFF DSP_DIG_DRFMODECTRL1 0xc010 //0xc000 //0x8000 //8PSK DSP_DIG_DRFLPM1 0x1620 //0x2020 changed back for man cal DSP_DIG_DRFPREH1 0xFFFF DSP_DIG_DRFPREL1 0xFFFF DSP_DIG_DRFPOSH1 0xFFFF DSP_DIG_DRFPOSL1 0xFFFF //TX Bias RF_TXPLL GSM850 GMSK 0x94e4000//0x94e40f7 //cc 88 - from Barry 100401 RF_TXPLL GSM GMSK 0x94e4000//0x94e40fa //cc 88 - from Barry 100401 RF_TXPLL DCS GMSK 0x94e4000//0x94e40df //cc 88 - from Barry 100401 RF_TXPLL PCS GMSK 0x94e4000//0x94e40e9 //cc 88 - from Barry 100401 RF_TXPLL GSM850 8PSK 0x94e4000 RF_TXPLL GSM 8PSK 0x94e4000 RF_TXPLL DCS 8PSK 0x94e4000 RF_TXPLL PCS 8PSK 0x94e4000 //SPYPA RF_SPI GSM850 GMSK 0x18 RF_SPI GSM GMSK 0x18 RF_SPI DCS GMSK 0x1c RF_SPI PCS GMSK 0x1c RF_SPI GSM850 8PSK 0x2a RF_SPI GSM 8PSK 0x2a RF_SPI DCS 8PSK 0x2e RF_SPI PCS 8PSK 0x2e /*** * Mixed mode switching dynamic writes for 2091A1 * These are not band dependent so band is hardcoded to 0 (GSM) * Number of writes is fixed to 5 in the source code ***/ // Mixed mode GMSK-8PSK or GMSK-AB TXMODE_SWITCH GSM GMSK 0 0x9e06000 TXMODE_SWITCH GSM GMSK 1 0x9012143 TXMODE_SWITCH GSM GMSK 2 0x900aaf0 TXMODE_SWITCH GSM GMSK 3 0x908740d TXMODE_SWITCH GSM GMSK 4 0x94e4000 // Mixed mode 8PSK-GMSK or 8PSK-AB TXMODE_SWITCH GSM 8PSK 0 0x90000ff TXMODE_SWITCH GSM 8PSK 1 0x90121c3 TXMODE_SWITCH GSM 8PSK 2 0x9e0600f TXMODE_SWITCH GSM 8PSK 3 0x90874cd TXMODE_SWITCH GSM 8PSK 4 0x94e40e9 //***************************************************************************** // AFC Coarse DAC parameters //***************************************************************************** CDAC_SHIFT 0 CDAC_MASK 0xff RF_AFC 0x0094000 //0x9c70000 //Set AFC register word, RF_AFC_SHIFT 0x0000 //For 2091, addr 0x9c7 is Fine (bit 13:0, 14bits) FREQ_ADJ_STEPSIZE 17 ...
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