LTJournal-V24N2-2014-07.pdf

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July 2014

Volume 24 Number 2

I N

T H I S

I S S U E

build your own high

performance portable DC

bench power supply

battery charging controller

actively finds true

maximum power point in

solar power applications

Fractional-N PLL with Integrated

6GHz+ VCO Delivers Fractional-N

Benefits without Complexity or

Performance Downsides

Michel Azarian

wireless precision

temperature sensor powers

itself, forms own network

Fractional-N synthesizers tempt with a number of advantages

over integer-N synthesizers, including frequency agility and overall

phase noise performance. Even in light of these advantages, PLL

system designers rarely yield to the temptation—complex design,

poor spurious performance, and delta-sigma modulator noise

are generally accepted

downsides of using

fractional-N synthesizers—but

the LTC6948 gives system

designers the benefits of

fractional-N PLLs without the

drawbacks. Unlike typical

fractional-N synthesizers, this

device is easy to use and

yields spurious and noise

performance on par with

integer-N synthesizers.

The LTC6948 integrates a high end 6GH

-plus

VCO in its 4mm × 5mm package

shrink-

ing the size of the PLL system. Furthermore

PLL system design with the LTC6948 is

LTC

3350 supercapacitor charger and backup controller ensures uninterrupted power in the event of a

Caption

main power failure (see page 2).

(continued on page 4)

w w w. li n e ar.co m

In this issue...

COVER STORY

Fractional-N PLL with Integrated 6GHz+

VCO Delivers Fractional-N Benefits without

Complexity or Performance Downsides

Michel Azarian

Linear in the News

NEW POWER PRODUCTS LAUNCHED

DESIGN FEATURES

High Performance Portable DC Bench Power Supply:

Save Money and Free Up Bench Real Estate by

Building Your Own

Keith Szolusha

Two significant new power management products were announced in May in

press meetings in key locations worldwide: the LTC3350 supercapacitor charger

and backup controller

and the LT

8620 2

synchronous step-down regulator.

LTC3350 Supercapacitor Charger and Backup Controller

80V Buck-Boost Lead-Acid and Lithium Battery

Charging Controller Actively Finds True Maximum

Power Point in Solar Power Applications

Tage Bjorklund

The LTC3350 includes all of the features necessary to provide a complete

stand-

alone capacitor-based backup power solution. It is ideal for applications requiring

reliable

short-term uninterrupted power in the event of a main power failure.

Examples include data backup for solid state drives

power fail alarms in medi-

cal and industrial applications

as well as other dying gasp power fail indicators.

The LTC3350 incorporates all PowerPath

™

control

capacitor stack charging

and balancing

and capacitor health monitoring circuitry necessary to provide a

complete

high reliability backup system. The device can charge and monitor a

series stack of one to four supercapacitors. The device’s synchronous step-down

controller drives N-channel MOSFET

for constant current

constant voltage charg-

ing

and can run in reverse as a step-up converter to deliver power from the

supercapacitor stack to the backup supply rail. Internal balancers eliminate the

need for external balance resistors and each capacitor has a shunt regulator for

overvoltage protection. All system currents and voltages as well as stack capaci-

tance and ESR are accurately measured using an internal

4-bit ADC and can be

read back via I

interface. Operating parameters such as capacitor charging

voltage can be programmed via I

to optimize system lifetime and performance.

LT8620 Wide Input Voltage Range Synchronous Step-Down Regulator

DESIGN IDEAS

What’s New with LTspice IV?

Gabino Alonso

Wireless Precision Temperature Sensor Powers Itself,

Forms Own Network, Enabling Easy Deployment

in Industrial Environments

Kris Lokere

Dual Phase Buck Controller Drives High Density

1.2V/60A Supply with Sub-Milliohm DCR Sensing

Mike Shriver

DC Accurate Driver for 20-Bit SAR

ADC Achieves 2ppm Linearity

Guy Hoover

Complete Single IC Power Management Battery

Maintenance/Backup System for 48V Supplies

Jay Celani

new product briefs

back page circuits

The LT8620 is the first synchronous high voltage step-down regulator with

an input voltage range of 3.4

to 65

delivering up to 2

to voltages as low

as 0.97

. Applications in automotive and commercial vehicles demand power

management IC

with increasingly high performance. For example

automo-

tive (

NOM

) or commercial vehicle (24

NOM

) applications running from the

battery bus require a well regulated output voltage such as 3.3

since the

input voltage can swing from 3.5

in a cold crank or stop

start scenario up

to 65

in a load dump scenario. High efficiency is a priority

with a focus

on minimizing thermal design considerations while maximizing battery run

time in hybrid and electric vehicles. For always-on automotive applications

such as security

navigation

safety and environmental control

minimal qui-

escent current is critical to avoid draining the battery when the car is idle.

The LTC8620’s internal synchronous rectification delivers efficiencies as high as

94%

eliminating the need for heat sinks

and Burst Mode

operation requires

2 | July 2014 :

LT Journal of Analog Innovation

Linear in the news

only 2.5

of quiescent current

reducing

battery drain associated with always-on

systems. The LT8620’s minimum on-time of

30ns enables stepping down from 32

with a switching frequency of 2MH

The device operates with only 250

(at

) of dropout under all conditions

ideal

for applications that must withstand cold

crank or soft-start operating conditions.

AWARDS

Boeing Performance Excellence Award

CISPR 25 Class 5 limit. Even with switching

frequencies in excess of 2MH

synchro-

nous rectification delivers efficiency as

high as 96% while Burst Mode operation

keeps quiescent current under 2.5

no-load standby conditions. This makes it

well suited for applications such as auto-

motive “always-on” systems

which need

to extend operating battery life. Its 3.4

input voltage range makes it ideal for

automotive and industrial applications.

CONFERENCES & EVENTS

LTspice

World Circuit—

Join Arrow Electronics

info at

secure.effreg.com

ltspice20

Free LTspice IV download at

www.linear.com

solutions

LTspice.

Techno Frontier, Power System Japan 2014,

Tokyo Big Sight, Tokyo, Japan, July 23-25,

Booth 1F-301—

Linear will exhibit power

system management

battery man-

agement systems and LTspice IV.

More info at

www.jma.or.jp

en.

The Battery Show/Electric & Hybrid Vehicle

Tech Expo, Suburban Collection Showcase,

Novi, Michigan, September 16-18, Booth

920—

Presenting Linear’s battery

The Boeing Company presented Linear

Technology with a Gold Performance

Excellence Award for superior supplier

performance over the past year.

Olympus Best Analog IC Supplier Award

Olympus Medical Systems Corporation

honored Linear Technology with its Best

Analog IC Supplier Award “for a great

contribution to product development over

the years.”

ECN Impact Awards

Winner, Best Integrated Circuit: LTC2378-20—

The

and Linear Technology for a free half-

day seminar with Mike Engelhardt

for both advanced and new users of

LTspice. Gain the knowledge to suc-

cessfully simulate circuit designs and

predict circuit behavior for faster

efficient designs. Offered at multiple

locations in the U.S.

Europe and Asia

July through September. Schedule &

management system products. More

info at

www.thebatteryshow.com.

LTC2378-20 is a 20-bit

sps

no latency

SAR ADC with industry leading 0.5ppm

integral nonlinearity error (INL). A true

20-bit ADC

the LTC2378-20 is able to

resolve down to 5

of resolution on a

differential input span. The device is

the first 20-bit SAR ADC offering extremely

stable ±0.5ppm (typical) INL error with

a guaranteed specification of 2ppm

(maximum) over temperature

making

it the most accurate ADC in the industry.

Applications include seismic monitor-

ing

energy exploration

airflow sensing

silicon wafer fabrication

medical devices

data acquisition systems

automatic test

equipment

compact instrumentation

and industrial process control systems.

Finalist, Power Sources Category: LT8614—

The

The LTC2378-20 20-bit

no-latency serial SAR

ADC was named Best

Integrated Circuit by

ECN

magazine. A true

20-bit ADC, it features

1Msps throughput and

0.5ppm INL.

LT86

4 Silent Switcher

™

is a 4

input

capable synchronous step-down switching

regulator that reduces EMI

EMC emis-

sions by more than 20

well below the

July 2014 :

LT Journal of Analog Innovation

| 3

The LTC6948 borrows the high performance phase/frequency

detector and VCO from the LTC6946, and adds an 18-bit delta-sigma

modulator to the mix to create a world-class fractional-N PLL.

(

LTC

6948, continued from page

)

IN-BAND PHASE NOISE FLOOR (dBc/Hz)

easy with the help of FracNWizard

™

a free and sophisticated fractional-N

PLL design and simulation tool.

WHO NEEDS A FRACTIONAL-N PLL?

would require a very small phase

fre-

quency detector rate

PFD(INT_N)

where

PFD(INT _N)

STEP(INT _N)

• O

−60

−70

−80

−90

−100

−110

M(NORM)

= −225dBc/Hz

−120

100k

10k

PFD

(Hz)

The LTC6946 integer-N PLL (

Journal

of Analog Innovation

January 20

produces a PLL output frequency

LO(INT_N)

that is related to the refer-

ence frequency

REF

as follows:

LO(INT _N)

REF

•

Often

in these situations

PFD

is too small

to be practically feasible

but even if it

were possible

the in-band phase noise

floor

M(OUT)

becomes prohibitively high:

(

OUT

)





(

NORM

)

10 • log

(

PFD

)

20 • log







PFD



10M

100M

where R is the reference input divide

value

N is the VCO feedback divide

value

and O is the output divide value.

Figure

shows the LTC6946’s simpli-

fied block diagram together with the

loop filter required to stabilize the loop

and an OCXO driving its reference.

The LTC6946 delivers excellent overall per-

formance

but certain applications require

that f

is moved in small frequency steps

STEP(INT_N)

or fine-tuned to track a certain

frequency with high resolution. Trying to

fit an integer-N PLL into such applications

where L

M(NORM)

is the normalized

in-band phase noise floor of the PLL.

Combining the two f

PFD

terms:

(

OUT

)

(

NORM

)

20 • log

(

)

−

10 • log

(

PFD

)

Figure 2. In-band phase noise floor of a PLL at a

fixed f

vs f

PFD

and assuming L

M(NORM)

= –225

the typical normalized constant

for the LTC6948 in fractional mode.

Figure 2 shows that f

PFD

needs to be

as high as possible

but it is strongly

limited by f

STEP(INT_N)

the frequency

step size in an integer-N PLL.

Fractional-N PLL

decouple this strong

relationship between f

STEP

and f

PFD

Fractional-N PLL

allow for a much

smaller f

STEP

than integer-N PLL

while

running at a much faster f

PFD

To further investigate the effect of f

PFD

the noise contribution of f

to a com-

munications channel

the phase noise is

integrated from

00MH

offset

on both sides of f

= 6.236GH

using

practical LTC6948 settings in FracNWizard.

Figure 3 summarizes the results.

The integrated noise shown in Figure 3

relates directly to the signal-to-noise ratio

(SNR) of the communications channel.

M(NORM)

is fixed for the PLL

so this

means that for the same desired f

the

in-band phase noise floor degrades by

−

0 • log

PFD

). In other words

smaller

PFD

frequencies make the in-band phase

noise floor worse. Figure 2 plots the last

equation for an f

of 6.236GH

while

varying f

PFD

from

00MH

Figure 1. Simplified

LTC6946 block diagram

with external reference

clock and loop filter

LTC6946

OCXO

CHARGE PUMP

PFD

LOOP FILTER

REF

÷R

PFD

CP(UP)

CP(DN)

÷N

VCO

÷O

V_TUNE

4 | July 2014 :

LT Journal of Analog Innovation

design features

The LTC6948 employs intelligent noise shaping techniques to minimize the in-band

noise contribution from the modulator. It boasts a normalized in-band phase noise floor,

M(NORM)

, of –225dBc/Hz in fractional-N mode that compares well with its –226dBc/Hz

integer-N mode performance. These numbers place the LTC6948 among the PLL elites.

DOUBLE-SIDEBAND

100Hz TO 100MHz INTEGRATED NOISE (dBc)

−25

−30

−35

where NUM is the numerator pro-

grammed into the delta-sigma modula-

tor internal to the LTC6948. Its value

can be any integer between

and

–

(or 262

43)

meaning 0 < F <

mentioned above

STEP(FRAC_N)

is small

relative to f

STEP(INT_N)

despite f

PFD(FRAC_N)

being typically larger than f

PFD(INT_N)

This allows the designer to choose the

highest possible f

PFD(FRAC_N)

given f

REF

taking advantage of the lowered in-

band phase noise floor as shown in

Figure 2

then verifying that f

STEP(FRAC_N)

is small enough to provide the desired

frequency resolution at f

LO(FRAC_N)

. The

following equation relates the step size

to the phase

frequency detector rate.

STEP(FRAC _N)

PFD(FRAC _N

)

O•2

−40

−45

designer can hit any frequency within

the VCO range with a maximum error of

±(

90.7/2 = 95.4

). A maximum error

of 95.4

out of ~6.236GH

is 0.0

5ppm

(parts per million) or

5ppb (parts per

billion)

eclipsing the accuracy of virtu-

ally any reference clock. Using a larger

than one output divide value

fur-

ther shrinks the absolute step size.

Employing a delta-sigma modulator to

perform the fractionalization function

in a PLL is the preferred method

because

a delta-sigma modulator provides high

resolution (such as the 2

steps possible

with the LTC6948) while intelligently

shaping the quantization noise. In other

words

the in-band quantization noise is

lowered at the expense of higher out-

of-band noise. The out-of-band noise

is easy to filter out with the help of the

passive components shown in Figure 4.

is shown in the “Design Example:

Doppler Radar” below

determining the

values of these components is straightfor-

ward using the FracNWizard software.

−50

PFD

(MHz)

Figure 3. Double-sideband, 100Hz to 100MHz

integrated noise at f

= 6.236GHz

Modern communications channels use

complex modulation schemes to maximize

data throughput

where an SNR of 40

B or

higher is common. Figure 3 shows that a

higher f

PFD

helps meet such requirements.

UNDER THE HOOD OF THE LTC6948

The LTC6948 borrows the high perfor-

mance phase

frequency detector and

VCO from the LTC6946

and adds an

8-bit delta-sigma modulator to the mix

to create a world-class fractional-N PLL.

Figure 4 shows the block diagram of

the LTC6948 along with the loop filter

and an OCXO acting as its reference.

For the LTC6948

LO(FRAC_N)

and

REF

are related as follows.

LO(FRAC _N)

REF

•

STEP(FRAC_N)

is 2

times smaller than

STEP(INT_N)

for the same f

PFD

. For example

an f

of 6.236GH

can be generated by

the LTC6948 with an f

PFD

of 50MH

result-

ing in outstanding in-band phase noise

floor with a frequency resolution of

90.7

(= f

STEP(FRAC_N)

). That means the

LTC6948

OCXO

CHARGE PUMP

PFD

LOOP FILTER

CP(UP)

CP(DN)

VCO

÷O

V_TUNE

REF

÷R

PFD

∆∑

÷ (N + F)

F is the fractional value and is given by

NUM

Figure 4. Simplified

LTC6948 block

diagram with external

reference clock and

loop filter

July 2014 :

LT Journal of Analog Innovation

| 5

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