HSSEC13.PDF

(16 KB) Pobierz
High-Speed Microcontroller User’s Guide
SECTION 13: TIMED ACCESS PROTECTION
The High-Speed Microcontroller uses a protection feature called Timed Access to prevent accidental
writes to critical SFR bits. These bits could cause a system failure or prevent the Watchdog Timer from
doing its job if improperly written. The Timed Access involves opening a timing window during which
the protected bit can be modified. If the window is opened correctly, it remains open long enough to alter
one protected bit. This section explains which bits are protected, why, and how to use the Timed Access
feature.
PROTECTED BITS
Bits which are protected by the Timed Access feature are shown below. Only critical function bits which
are unique to the High-Speed Microcontroller family are protected, assuring code compatibility with the
original 80C51 or 80C52. A full description of the function of each bit is provided in Section 4.
EXIF.0
WDCON.6
WDCON.1
WDCON.0
WDCON.3
TRIM.7
TRIM.6
TRIM.5
TRIM.4
TRIM.3
TRIM.2
TRIM.1
TRIM.0
ROMSIZE.2
ROMSIZE.1
ROMSIZE.0
RTCC.2
RTCC.0
BGS
POR
EWT
RWT
WDIF
E4K
X12/
6
TRM2
Band-gap Select
Power-on Reset Flag
Watchdog Reset Enable
Reset Watchdog Timer
Watchdog Interrupt Flag
4096 Hz RTC Output
12pF/6pF Crystal Select
Capacitance Trim Bit 2
TRM2
Inverse Capacitance Trim Bit 2
TRM1
Capacitance Trim Bit 1
TRM1
Inverse Capacitance Trim Bit 1
TRM0
Capacitance Trim Bit 0
TRM0
Inverse Capacitance Trim Bit 0
RMS2
ROM Size Select Bit 2
RMS1
ROM Size Select Bit 1
RMS0
ROM Size Select Bit 0
RTCWE RTC Write Enable
RTCE
RTC Enable
PROTECTION SCHEME
Each bit mentioned above is protected against an accidental write by requiring the software to perform a
procedure before writing the bit. Timed Access requires the software to write two specific values to the
Timed Access register during two consecutive instruction cycles. The values AAh, then 55h, must be
written in consecutive instructions to the TA register at SFR location C7h. If the writes are performed
correctly, the write access window will open for three machine cycles. During this window, the software
may modify a protected bit. The suggested code to open a Timed Access window is:
MOV 0C7h, #0AAh
MOV 0C7h, #55h
The procedure to modify a Timed Access protected bit begins by writing the value AAh to the Time
Access register (TA;C7h). The value 55h must then be written to the Timed Access register within three
machine cycles of writing AAh. This opens a three machine cycle window, after the write of 55h, during
which any Timed Access protected bits may be modified. Failure to complete any of the required steps
will also require the procedure to begin again, starting with the write of AAh to the Timed Access
register. Attempts to modify Timed Access protected bits after the window has closed will be ignored.
155 of 175
High-Speed Microcontroller User’s Guide
This is regardless of whether any bits were modified. Figure 13-1 illustrates a number of examples of
correct and incorrect use of the Timed Access procedure.
TIMED ACCESS EXAMPLES
Figure 13-1
three machine cycles
MOV 0C7h, #0AAh
three machine cycles
MOV 0C7h, #0AAh
three machine cycles
MOV 0C7h, #0AAh
three machine cycles
MOV 0C7h, #55h
three machine cycles
MOV 0C7h, #55h
three machine cycles
MOV 0C7h, #55h
three machine cycles
SETB EWT
one machine cycle
NOP
three machine cycles
MOV WDCON, #02h
two machine cycles
SETB EWT
VALID TIMED ACCESS PROCEDURES
three machine cycles
MOV 0C7h, #0AAh
one machine cycles
NOP
three machine cycle
MOV 0C7h, #55H
two machine cycles
SETB EWT
*Second write to TA register does not occur within 3 cycles of first write.
three machine cycles
MOV 0C7h, #0AAh
three machine cycles
MOV 0C7h, #55H
one machine cycle
NOP
three machine cycles
MOV WDCON, #02h
*Modification of protected bit did not occur with 3 cycles of second write to TA register.
three machine cycles
MOV 0C7h, #0AAh
three machine cycles
MOV 0C7h, #55h
two machine cycle
SETB EWT
two machine cycles
SETB EWT
*Modification of second protected bit did not complete within 3 cycles of second write to TA register.
INVALID TIMED ACCESS PROCEDURES
TIMED ACCESS PROTECTS WATCHDOG
Any microcontroller-based system can be faced with environmental conditions that are beyond its
designed abilities. These include external signal transients due to component failure, fluctuating power
conditions, massive electrostatic discharge (ESD), and other unexpected system events. When a
microcontroller is exposed to such conditions, program execution can become corrupted. Members of the
High-Speed Microcontroller family which incorporate a Watchdog Timer can initiate a reset to recover
from these conditions. The primary function of the Timed Access feature is to protect against accidental
disabling of the watchdog timer by an “out-of-control” device. This will allow the watchdog timer to
reset the system in the event of program execution failure.
The following hypothetical example demonstrates how a single bit change can corrupt program
execution. The Timed Access procedure protects against an accidental write to the EWT bit by the errant
code, allowing the watchdog timer reset function to reset the device. While this is a purely fictitious
example, it illustrates how the watchdog timer and Timed Access feature make the High-Speed
Microcontroller minimize the effect of accidental code corruption.
Note: Timed Access is not optional
and must be supported if the protected bits are used. This example simply helps explain the category of
problem that the Timed Access prevents.
156 of 175
High-Speed Microcontroller User’s Guide
EXAMPLE: A TRANSIENT CAUSES THE WATCHDOG TO BE DISABLED
TABLE_READ:
C2D2 90 0A 00
MOV
DPTR, 0A00H
;LOAD TABLE POINTER
C2D5 79 FF
MOV
R1, #0FFH
;LOAD COUNTER
C2D7 78 90
MOV
R0, #90H
;DESTINATION POINTER
LOOP:
MOVX
MOV
INC
INC
DJNZ
C2D9
C2DA
C2DB
C2DC
C2DD
E0
F6
06
A3
D9 C2 D9
A, @DPTR
@R0, A
R0
DPTR
R1, LOOP
;READ DATA BYTE
;STORE IT IN RAM
;NEXT TABLE LOCATION
;NEXT DATA VALUE
;NEXT BYTE OR DONE ?
A transient occurs while the opcode is being fetched for the first instruction. The transient causes one bit
of the opcode in the first instruction to be read as a 0 instead of 1. The resulting program is what the
microcontroller would actually execute:
TABLE_READ:
C2D2 80 0A 00
C2D5 79 FF
C2D7 78 90
SJMP
MOV
MOV
LOOP:
MOVX
MOV
INC
INC
DJNZ
0BH
R1, #0FFH
R0, #90H
;RELATIVE
JUMP BY 10 LOCATIONS
;LOAD COUNTER
;DESTINATION POINTER
C2D9
C2DA
C2DB
C2DC
C2DD
E0
F6
06
A3
D9 C2 D9
A, @DPTR
@R0, A
R0
DPTR
R1, LOOP
;READ DATA BYTE
;STORE IT IN RAM
;NEXT TABLE LOCATION
;NEXT DATA VALUE
;NEXT BYTE OR DONE ?
The resulting jump is to address C2DE. This is not even a real opcode, but would be treated as such. The
resulting fetch is the value C2 D9. This is the opcode for CLR D9h. The bit addressable location D9h
corresponds to the EWT - Enable Watchdog Timer. If the Timed Access procedure did not prevent it,
this errant instruction would disable the Watchdog. Note that now, the program execution is completely
lost. Real opcodes are being replaced by operands, data and garbage. In the High-Speed Microcontroller,
the Watchdog will recover from this state as soon as it times out since it could not have been disabled in
this way.
In the High-Speed Microcontroller it is very hard to contrive a situation that will accidentally disable the
Watchdog. Note, the Timed Access prevents accidentally writing a bit. It can not prevent accidentally
calling the correct code that writes a bit. This is much more unlikely however.
157 of 175

Plik z chomika:

Inne pliki z tego folderu:

Inne foldery tego chomika:

Zgłoś jeśli naruszono regulamin