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Appendix D: The 80x86 Instruction Set

The 80x86 Instruction Set

Appendix D

The following three tables discuss the integer/control, ﬂoating point, and MMX instruction sets. This document uses the fol-

lowing abbreviations:

imm-

A constant value, must be appropriate for the operand size.

imm8- An eight-bit immediate constant. Some instructions limit the range of this value to less than 0..255.

immL- A 16- or 32-bit immediate constant.

immH- A 16- or 32-bit immediate constant.

reg-

reg8-

reg16-

reg32-

mem-

A general purpose integer register.

A general purpose eight-bit register

A general purpose 16-bit register.

A general purpose 32-bit register.

An arbitrary memory location using any of the available addressing modes.

mem16- A word variable using any legal addressing mode.

mem32- A dword variable using any legal addressing mode.

mem64- A qword variable using any legal addressing mode.

label-

A statement label in the program.

ProcedureName-The name of a procedure in the program.

Instructions that have two source operands typically use the ﬁrst operand as a source operand and the second operand as a

destination operand. For exceptions and other formats, please see the description for the individual instruction.

Note that this appendix only lists those instructions that are generally useful for application programming. HLA actually sup-

ports some additional instructions that are useful for OS kernel developers; please see the HLA documentation for more details

on those instructions.

Table 1: 80x86 Integer and Control Instruction Set

Instruction Syntax

aaa()

aad()

aam()

aas()

adc( imm, reg );

adc( imm, mem );

adc( reg, reg );

adc( reg, mem );

adc( mem, reg );

Description

ASCII Adjust after Addition. Adjusts value in AL after a decimal addition operation.

ASCII Adjust before Division. Adjusts two unpacked values in AX prior to a decimal

division.

ASCII Adjust AX after Multiplication. Adjusts the result in AX for a decimal mulit-

ply.

ASCII Adjust AL after Subtraction. Adjusts the result in AL for a decimal subtraction.

Add with carry. Adds the source operand plus the carry ﬂag to the destination oper-

and.

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AppendixD

Table 1: 80x86 Integer and Control Instruction Set

Instruction Syntax

add( imm, reg );

add( imm, mem );

add( reg, reg );

add( reg, mem );

add( mem, reg );

and( imm, reg );

and( imm, mem );

and( reg, reg );

and( reg, mem );

and( mem, reg );

bound( reg, mem );

bound( reg, immL,

immH );

Description

Add. Adds the source operand to the destination operand.

Bitwise AND. Logically ANDs the source operand into the destination operand.

Clears the carry and overﬂow ﬂags and sets the sign and zero ﬂags according to the

result.

Bounds check. Reg and memory operands must be the same size and they must be 16

or 32-bit values. This instruction compares the register operand against the value at

the speciﬁed memory location and raises an exception if the register’s value is less

than the value in the memory location. If greater or equal, then this instruction com-

pares the register to the next word or dword in memory and raises an exception if the

The second form of this instruction is an HLA extended syntax instruction. HLA

encodes the constants as two memory locations and then emits the ﬁrst form of this

instruction using these newly created memory locations.

For the second form, the constant values must not exceed the 16-bit or 32-bit register

size.

bsf( reg, reg );

bsr( mem, reg );

Bit Scan Forward. The two operands must be the same size and they must be 16-bit or

32-bit operands. This instruction locates the ﬁrst set bit in the source operand and

stores the bit number into the destination operand and clears the zero ﬂag. If the

source operand does not have any set bits, then this instruction sets the zero ﬂag and

the dest register value is undeﬁned.

Bit Scan Reverse. The two operands must be the same size and they must be 16-bit or

32-bit operands. This instruction locates the last set bit in the source operand and

stores the bit number into the destination operand and clears the zero ﬂag. If the

source operand does not have any set bits, then this instruction sets the zero ﬂag and

the dest register value is undeﬁned.

Byte Swap. This instruction reverses the order of the bytes in a 32-bit register. It

swaps bytes zero and three and it swaps bytes one and two. This effectively converts

data between the little endian (used by Intel) and big endian (used by some other

CPUs) formats.

bsr( reg, reg );

bsr( mem, reg );

bswap( reg32 );

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Appendix D: The 80x86 Instruction Set

Table 1: 80x86 Integer and Control Instruction Set

Instruction Syntax

bt( reg, mem);

bt( reg, reg );

bt( imm8, reg );

bt( imm8, mem );

Description

ues must be in the range 0..15 for 16-bit registers, 0..31 for 32-bit registers, and 0..255

for memory operands. Source register must be in the range 0..15 or 0..31 for registers.

Any value is legal for the source register if the destination operand is a memory loca-

tion. This instruction copies the bit in the second operand, whose bit position the ﬁrst

operand speciﬁes, into the carry ﬂag.

Bit test and complement. As above, except this instruction also complements the value

of the speciﬁed bit in the second operand. Note that this instruction ﬁrst copies the bit

to the carry ﬂag, then complements it. To support atomic operations, the mem-

ory-based forms of this instruction are always “memory locked” and they always

directly access main memory; the CPU does not use the cache for this result. Hence,

this instruction always operates at memory speeds (i.e., slow).

Bit test and reset. Same as BTC except this instruction tests and resets (clears) the bit.

btc( reg, mem);

btc( reg, reg );

btc( imm8, reg );

btc( imm8, mem );

btr( reg, mem);

btr( reg, reg );

btr( imm8, reg );

btr( imm8, mem );

bts( reg, mem);

bts( reg, reg );

bts( imm8, reg );

bts( imm8, mem );

call label;

call( label );

call( reg32 );

call( mem32 );

cbw();

cdq();

clc();

cld();

cli();

cmc();

cmova( mem, reg );

cmova( reg, reg );

cmova( reg, mem );

Bit test and set. Same as BTC except this instructions tests and sets the bit.

Pushes a return address onto the stack and calls the subroutine at the address speci-

ﬁed. Note that the ﬁrst two forms are the same instruction. The other two forms pro-

vide indirect calls via a register or a pointer in memory.

Convert Byte to Word. Sign extends AL into AX.

Convert double word to quadword. Sign extends EAX into EDX:EAX.

Clear Carry.

Clear direction ﬂag. When the direction ﬂag is clear the string instructions increment

ESI and/or EDI after each operation.

Clear the interrupt enable ﬂag.

Complement (invert) Carry.

Conditional Move (if above). Copies the source operand to the destination operand if

the previous comparison found the left operand to be greater than (unsigned) the right

operand (c=0, z=0). Register and memory operands must be 16-bit or 32-bit values,

eight-bit operands are illegal. Does not affect the destination operand if the condition

is false.

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AppendixD

Table 1: 80x86 Integer and Control Instruction Set

Instruction Syntax

cmovae( mem, reg );

cmovae( reg, reg );

cmovae( reg, mem );

cmovb( mem, reg );

cmovb( reg, reg );

cmovb( reg, mem );

cmovbe( mem, reg );

cmovbe( reg, reg );

cmovbe( reg, mem );

cmovc( mem, reg );

cmovc( reg, reg );

cmovc( reg, mem );

cmove( mem, reg );

cmove( reg, reg );

cmove( reg, mem );

cmovg( mem, reg );

cmovg( reg, reg );

cmovg( reg, mem );

cmovge( mem, reg );

cmovge( reg, reg );

cmovge( reg, mem );

cmovl( mem, reg );

cmovl( reg, reg );

cmovl( reg, mem );

cmovle( mem, reg );

cmovle( reg, reg );

cmovle( reg, mem );

cmovna( mem, reg );

cmovna( reg, reg );

cmovna( reg, mem );

cmovnae( mem, reg );

cmovnae( reg, reg );

cmovnae( reg, mem );

cmovnb( mem, reg );

cmovnb( reg, reg );

cmovnb( reg, mem );

Description

Conditional move if above or equal (see cmova for details).

Conditional move if below (see cmova for details).

Conditional move if below or equal (see cmova for details).

Conditional move if carry set (see cmova for details).

Conditional move if equal (see cmova for details).

Conditional move if (signed) greater (see cmova for details).

Conditional move if (signed) greater or equal (see cmova for details).

Conditional move if (signed) less than (see cmova for details).

Conditional move if (signed) less than or equal (see cmova for details).

Conditional move if (unsigned) not greater (see cmova for details).

Conditional move if (unsigned) not greater or equal (see cmova for details).

Conditional move if (unsigned) not less than (see cmova for details).

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Appendix D: The 80x86 Instruction Set

Table 1: 80x86 Integer and Control Instruction Set

Instruction Syntax

cmovnbe( mem, reg );

cmovnbe( reg, reg );

cmovnbe( reg, mem );

cmovnc( mem, reg );

cmovnc( reg, reg );

cmovnc( reg, mem );

cmovne( mem, reg );

cmovne( reg, reg );

cmovne( reg, mem );

cmovng( mem, reg );

cmovng( reg, reg );

cmovng( reg, mem );

cmovnge( mem, reg );

cmovnge( reg, reg );

cmovnge( reg, mem );

cmovnl( mem, reg );

cmovnl( reg, reg );

cmovnl( reg, mem );

cmovnle( mem, reg );

cmovnle( reg, reg );

cmovnle( reg, mem );

cmovno( mem, reg );

cmovno( reg, reg );

cmovno( reg, mem );

cmovnp( mem, reg );

cmovnp( reg, reg );

cmovnp( reg, mem );

cmovns( mem, reg );

cmovns( reg, reg );

cmovns( reg, mem );

cmovnz( mem, reg );

cmovnz( reg, reg );

cmovnz( reg, mem );

cmovo( mem, reg );

cmovo( reg, reg );

cmovo( reg, mem );

Description

Conditional move if (unsigned) not less than or equal (see cmova for details).

Conditional move if no carry/carry clear (see cmova for details).

Conditional move if not equal (see cmova for details).

Conditional move if (signed) not greater (see cmova for details).

Conditional move if (signed) not greater or equal (see cmova for details).

Conditional move if (signed) not less than (see cmova for details).

Conditional move if (signed) not less than or equal (see cmova for details).

Conditional move if no overﬂow / overﬂow ﬂag = 0 (see cmova for details).

Conditional move if no parity / parity ﬂag = 0 / odd parity (see cmova for details).

Conditional move if no sign / sign ﬂag = 0 (see cmova for details).

Conditional move if not zero (see cmova for details).

Conditional move if overﬂow / overﬂow ﬂag = 1 (see cmova for details).

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