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OW TO USE

NTELLIGENT

L.C.D.

Part Two

By Julyan Ilett

This paper was originally published as the second half of a two-part

article in the March 1997 issue of

Everyday Practical Electronics

magazine (www.epemag.wimborne.co.uk), and is reproduced here

with their kind permission.

Everyday Practical Electronics

Recreated in Adobe Acrobat PDF format for your web-based reading pleasure by

Maxfield & Montrose Interactive Inc.

www.maxmon.com

How to use

Intelligent L.C.D.s

By Julyan Ilett

An utterly “practical” guide to interfacing

and programming intelligent liquid crystal

display modules.

Part Two

In the first part of this article, the capabilities of character-based liquid crystal display

(l.c.d.) modules were examined, using a few simple, practical experiments. A series of

switches was all that was needed to evaluate the command set in its most fundamental

form, in binary (or hexadecimal).

However, in almost all instances where an l.c.d. is to be used in a design, a micro-

processor, or more probably a microcontroller, will be needed to drive it. This is the

subject we examine now.

Good Times

The timing requirements of the HD44780 chip, the controlling device used in most

character-based l.c.d. modules, are illustrated in Figure 6. The diagram provides the

information for both read and write cycles, although some data sheets may show the

two separately. Table 4 details the timing parameters referred to in Figure 6.

RS Valid

R/W

R/W Valid

DATA (D0 to D7)

Data Valid

Figure 6: HD44780 timing diagram

In the experiments last month, commands were sent to the display by pressing switches on

an experimental test rig. Nothing much went wrong there, so why is it necessary to have

such a complex timing diagram?

Well, we human beings leave plenty of time between pressing one switch and the next, so

the l.c.d. controller can easily keep up with us. Microcontrollers are faster than we are,

though; they can toggle a control line several million times a second, and at such speeds

the l.c.d. controller might not keep pace with the commands.

The timing diagram and its tabulated figures simply tell us how quickly the l.c.d. chip can

respond so that we can program the microcontroller accordingly.

Let's take a typical microcontroller, one of the PIC devices which have become so

popular, and see how we program it to control an l.c.d. from the quoted timing details.

We have published several PIC-based

projects in recent month's which are well

worth studying, along with their software

listings. See the

Back Issues

and

EPE

PCB Service

pages. Ed.)

First, though, it must be pointed out that the

discussions from now assume that you have a

rudimentary understanding of programming PIC

microcontrollers, and that you have suitable

software and equipment for doing so. It is not the

intention of this article to teach PIC programming.

The PIC microcontroller would be programmed to start by first setting the l.c.d.'s RS line

to its correct logic level. This is the line that determines whether the l.c.d. should regard

data as control instructions or character information. In cases where data needs to be read

back from the l.c.d., the microcontroller must also have control over the R/W line

(read/write), otherwise it should be connected to ground, as on the test rig.

The microcontroller can set up

these two signals at the same time,

or it may do one before the other, it

doesn't really matter. What is

important, is that they are both

“valid” or “stable” for a minimum

period of time before the level on

the “E” (Enable) line is raised to a

logic 1. On the diagram in Figure 6,

this period is shown as “tAS” (time

– address setup), and in the table

this is specified as 140ns minimum.

It can be more than 140ns, but it

must not be any less.

Table 4: HD44780 Timing Parameters.

Once line E is high, it must not be brought low again until at least 450ns has elapsed, as is

indicated by the “tEH'” (time -- enable high). Also, all eight data lines must be set to their

appropriate logic levels and allowed to stabilise for at least the “tDS” (time -- data setup)

period of 200ns before bringing line E low again.

Note that the l.c.d. allows the data lines to be set up after line E is taken high. In the

experiments last month, data was established well before the E switch was pressed, but

either condition is allowed.

When line E is returned to a low level, there are also two hold times that must be taken

into account. The “tAH” (time -- address hold) parameter indicates that the RS and R/W

lines must not be altered for at least 10ns, and “tDH'” (time -- data hold) shows that none

of the data lines must change for at least 20ns.

One further restriction exists. The E line must not be taken high again (for the next

command, that is) for another 500ns (“tEL”: time -- enable low). This means that the total

cycle time of the E line is 450ns plus 500ns. Allowing for the rise and fall times, indicated

by “tRF”, which should be no longer than 25ns each, an approximate value of 1µs can be

calculated. This means that no more than one million commands (or one million characters)

per second should be sent to the display, not a restriction that would normally present

many problems!

Busy

The timing diagram doesn't tell the whole story, however. Much longer delays are

required to enable the l.c.d. to process commands and data. Most commands tie-up

the l.c.d. for 40µs, during which time it is said to be “busy.” The Clear Display and

Cursor Home commands, though, can

take a lot longer.

Execution times for all the instructions are

shown in Table 5. This includes all the

commands, writing data to the display,

and reading both data and status. The

two Read instructions have not yet been

experimented with, but reading the status

of the l.c.d. is the method used to determine

whether or not it is busy.

The practical implication of these

instruction times is just a case of having to

insert a delay between one instruction and

the next. The first two commands, Clear

Display and Cursor Home, have variable

execution times that depend upon several

factors. Not much is said about this variation in the data sheets, but it does involve

returning the cursor to address 10000000 ($80), unshifting the display and, in the case of

Clear Display, putting a space character into each display address.

There is one other important situation when the l.c.d. will be busy. This is immediately

after it has been powered up. It takes some 10 to 15 milliseconds for the full initialisation

sequence to be completed, during which time no instructions can be executed.

This has important implications for a circuit using a microcontroller. A suitable delay

must be added to the beginning of the program, otherwise the l.c.d. won't be ready when

the first few instructions are sent to it and could become locked up in a non-correctable

condition, requiring the power to be switched off again for a while.

New Circuit

Time now to re-wire last month's experimental test rig to incorporate the PIC micro-

controller. The circuit diagram of the modified arrangement is shown in Figure 7. There's

no longer any need for the debounce circuit, the microcontroller provides very clean

output signals. It is not essential to use the PIC16C84 type specified in the diagram, the

54, 56, 61 and 71 types can all be used, but some minor changes may need to be made to

one or two of the pin connections.

However, it is best to experiment with the PIC16C84 since it is the EEPROM (Electrically

Erasable Programmable Read Only Memory) version of the microcontroller.

The use of this version is desirable because several different versions of software will

need to be programmed and erased during the course of experimentation. Other versions

of the microcontroller cannot be erased so easily, indeed some cannot be erased at all

(those referred to as OTP, One-Time Programmable devices, for example).

X1 LCD Module

R/W

Vee

Vdd

Vss

+5V

RB7

RB6

RB5

RB4

RB3

RB2

RB1

RB0

Vdd

(V+)

RA0

Vss

(GND) OSC1

IC1 PIC16C84

OSC2

MCLR

RTCC

RA3

RA2

RA1

R1 4k7

47p

VR1

Figure 7: Circuit diagram for interfacing a PIC16C84

microcontroller to an l.c.d. module.

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