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TL494
SWITCHMODE
Pulse Width
Modulation Control Circuit
The TL494 is a fixed frequency, pulse width modulation control circuit
designed primarily for SWITCHMODE power supply control.
SWITCHMODE
PULSE WIDTH MODULATION
CONTROL CIRCUIT
SEMICONDUCTOR
TECHNICAL DATA
Complete Pulse Width Modulation Control Circuitry
On–Chip Oscillator with Master or Slave Operation
On–Chip Error Amplifiers
On–Chip 5.0 V Reference
Adjustable Deadtime Control
Uncommitted Output Transistors Rated to 500 mA Source or Sink
Output Control for Push–Pull or Single–Ended Operation
Undervoltage Lockout
D SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16)
N SUFFIX
PLASTIC PACKAGE
CASE 648
PIN CONNECTIONS
Noninv
Input 1
Inv
Input 2
Compen/PWN
Comp Input 3
Deadtime
Control 4
CT 5
Oscillator
+
Error 1
Amp
MAXIMUM RATINGS
(Full operating ambient temperature range applies,
unless otherwise noted.)
Rating
Power Supply Voltage
Collector Output Voltage
Collector Output Current
(Each transistor) (Note 1)
Amplifier Input Voltage Range
Power Dissipation @ TA
45°C
Thermal Resistance,
Junction–to–Ambient
Operating Junction Temperature
Storage Temperature Range
Operating Ambient Temperature Range
TL494C
TL494I
Derating Ambient Temperature
NOTE:
+
2 Error
Amp
VCC
5.0 V
REF
Noninv
16 Input
Inv
15 Input
14 Vref
Output
13 Control
12 VCC
11 C2
0.1 V
Symbol
VCC
VC1,
VC2
IC1, IC2
VIR
PD
R
θJA
TJ
Tstg
TA
TL494C
42
42
500
TL494I
Unit
V
V
mA
V
mW
°C/W
°C
°C
°C
RT 6
Q2
Ground 7
C1 8
Q1
10 E2
9 E1
–0.3 to +42
1000
80
125
–55 to +125
0 to +70
– 25 to +85
(Top View)
ORDERING INFORMATION
Device
TL494CD
TL494CN
Operating
Temperature Range
TA = 0° to +70°C
TA = – 25° to +85°C
Package
SO–16
Plastic
Plastic
TA
45
°C
TL494IN
1. Maximum thermal limits must be observed.
©
Motorola, Inc. 1995
MOTOROLA ANALOG IC DEVICE DATA
1
TL494
RECOMMENDED OPERATING CONDITIONS
Characteristics
Power Supply Voltage
Collector Output Voltage
Collector Output Current (Each transistor)
Amplified Input Voltage
Current Into Feedback Terminal
Reference Output Current
Timing Resistor
Timing Capacitor
Oscillator Frequency
Symbol
VCC
VC1, VC2
IC1, IC2
Vin
lfb
lref
RT
CT
fosc
Min
7.0
–0.3
1.8
0.0047
1.0
Typ
15
30
30
0.001
40
Max
40
40
200
VCC – 2.0
0.3
10
500
10
200
Unit
V
V
mA
V
mA
mA
kΩ
µF
kHz
ELECTRICAL CHARACTERISTICS
(VCC = 15 V, CT = 0.01
µF,
RT = 12 kΩ, unless otherwise noted.)
For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.
Characteristics
REFERENCE SECTION
Reference Voltage (IO = 1.0 mA)
Line Regulation (VCC = 7.0 V to 40 V)
Load Regulation (IO = 1.0 mA to 10 mA)
Short Circuit Output Current (Vref = 0 V)
OUTPUT SECTION
Collector Off–State Current
(VCC = 40 V, VCE = 40 V)
Emitter Off–State Current
VCC = 40 V, VC = 40 V, VE = 0 V)
Collector–Emitter Saturation Voltage (Note 2)
Common–Emitter (VE = 0 V, IC = 200 mA)
Emitter–Follower (VC = 15 V, IE = –200 mA)
Output Control Pin Current
Low State (VOC
0.4 V)
High State (VOC = Vref)
Output Voltage Rise Time
Common–Emitter (See Figure 12)
Emitter–Follower (See Figure 13)
Output Voltage Fall Time
Common–Emitter (See Figure 12)
Emitter–Follower (See Figure 13)
IC(off)
IE(off)
2.0
100
–100
µA
µA
V
Vsat(C)
Vsat(E)
IOCL
IOCH
tr
tf
25
40
100
100
100
100
200
200
ns
1.1
1.5
10
0.2
1.3
2.5
3.5
µA
mA
ns
Vref
Regline
Regload
ISC
4.75
15
5.0
2.0
3.0
35
5.25
25
15
75
V
mV
mV
mA
Symbol
Min
Typ
Max
Unit
NOTE:
2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible.
2
MOTOROLA ANALOG IC DEVICE DATA
TL494
ELECTRICAL CHARACTERISTICS
(VCC = 15 V, CT = 0.01
µF,
RT = 12 kΩ, unless otherwise noted.)
For typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies, unless otherwise noted.
Characteristics
ERROR AMPLIFIER SECTION
Input Offset Voltage (VO (Pin 3) = 2.5 V)
Input Offset Current (VO (Pin 3) = 2.5 V)
Input Bias Current (VO (Pin 3) = 2.5 V)
Input Common Mode Voltage Range (VCC = 40 V, TA = 25°C)
Open Loop Voltage Gain (∆VO = 3.0 V, VO = 0.5 V to 3.5 V, RL = 2.0 kΩ)
Unity–Gain Crossover Frequency (VO = 0.5 V to 3.5 V, RL = 2.0 kΩ)
Phase Margin at Unity–Gain (VO = 0.5 V to 3.5 V, RL = 2.0 kΩ)
Common Mode Rejection Ratio (VCC = 40 V)
Power Supply Rejection Ratio (∆VCC = 33 V, VO = 2.5 V, RL = 2.0 kΩ)
Output Sink Current (VO (Pin 3) = 0.7 V)
Output Source Current (VO (Pin 3) = 3.5 V)
PWM COMPARATOR SECTION
(Test Circuit Figure 11)
Input Threshold Voltage (Zero Duty Cycle)
Input Sink Current (V(Pin 3) = 0.7 V)
DEADTIME CONTROL SECTION
(Test Circuit Figure 11)
Input Bias Current (Pin 4) (VPin 4 = 0 V to 5.25 V)
Maximum Duty Cycle, Each Output, Push–Pull Mode
(VPin 4 = 0 V, CT = 0.01
µF,
RT = 12 kΩ)
(VPin 4 = 0 V, CT = 0.001
µF,
RT = 30 kΩ)
Input Threshold Voltage (Pin 4)
(Zero Duty Cycle)
(Maximum Duty Cycle)
OSCILLATOR SECTION
Frequency (CT = 0.001
µF,
RT = 30 kΩ)
Standard Deviation of Frequency* (CT = 0.001
µF,
RT = 30 kΩ)
Frequency Change with Voltage (VCC = 7.0 V to 40 V, TA = 25°C)
Frequency Change with Temperature (∆TA = Tlow to Thigh)
(CT = 0.01
µF,
RT = 12 kΩ)
UNDERVOLTAGE LOCKOUT SECTION
Turn–On Threshold (VCC increasing, Iref = 1.0 mA)
TOTAL DEVICE
Standby Supply Current (Pin 6 at Vref, All other inputs and outputs open)
(VCC = 15 V)
(VCC = 40 V)
Average Supply Current
(CT = 0.01
µF,
RT = 12 kΩ, V(Pin 4) = 2.0 V)
(VCC = 15 V) (See Figure 12)
ICC
5.5
7.0
7.0
10
15
mA
mA
Vth
5.5
6.43
7.0
V
fosc
σf
osc
∆f
osc (∆V)
∆f
osc (∆T)
40
3.0
0.1
12
kHz
%
%
%
IIB (DT)
DCmax
45
Vth
0
2.8
3.3
48
45
50
50
V
–2.0
–10
µA
%
VTH
II–
0.3
2.5
0.7
4.5
V
mA
VIO
IIO
IIB
VICR
AVOL
fC–
φ
m
CMRR
PSRR
IO–
IO+
70
65
0.3
2.0
2.0
5.0
–0.1
–0.3 to VCC–2.0
95
350
65
90
100
0.7
–4.0
10
250
–1.0
mV
nA
µA
V
dB
kHz
deg.
dB
dB
mA
mA
Symbol
Min
Typ
Max
Unit
* Standard deviation is a measure of the statistical distribution about the mean as derived from the formula,
σ
N
Σ
(Xn – X)2
n=1
N–1
MOTOROLA ANALOG IC DEVICE DATA
3
TL494
Figure 1. Representative Block Diagram
Output Control
13
6
Oscillator
RT
CT
5
+
4
Deadtime
Control
0.7V
+
0.7mA
+
1
1
2
3
Feedback PWM
Comparator Input
2
PWM
Comparator
+
15
16
UV
Lockout
+
+
3.5V
14
Ref.
Output
7
Gnd
4.9V
Reference
Regulator
12
VCC
Deadtime
Comparator
Ck
D
Flip–
Flop
Q
Q2 11
10
Q
Q1
8
9
VCC
0.12V
Error Amp
1
Error Amp
2
Figure 2. Timing Diagram
Capacitor CT
Feedback/PWM Comp.
Deadtime Control
Flip–Flop
Clock Input
Flip–Flop
Q
Flip–Flop
Q
Output Q1
Emitter
Output Q2
Emitter
Output
Control
4
MOTOROLA ANALOG IC DEVICE DATA
TL494
APPLICATIONS INFORMATION
Description
The TL494 is a fixed–frequency pulse width modulation
control circuit, incorporating the primary building blocks
required for the control of a switching power supply. (See
Figure 1.) An internal–linear sawtooth oscillator is frequency–
programmable by two external components, RT and CT. The
approximate oscillator frequency is determined by:
fosc
1.1
RT
CT
may be used to sense power–supply output voltage and
current. The error–amplifier outputs are active high and are
ORed together at the noninverting input of the pulse–width
modulator comparator. With this configuration, the amplifier
that demands minimum output on time, dominates control of
the loop.
When capacitor CT is discharged, a positive pulse is
generated on the output of the deadtime comparator, which
clocks the pulse–steering flip–flop and inhibits the output
transistors, Q1 and Q2. With the output–control connected to
the reference line, the pulse–steering flip–flop directs the
modulated pulses to each of the two output transistors
alternately for push–pull operation. The output frequency is
equal to half that of the oscillator. Output drive can also be
taken from Q1 or Q2, when single–ended operation with a
maximum on–time of less than 50% is required. This is
desirable when the output transformer has a ringback
winding with a catch diode used for snubbing. When higher
output–drive currents are required for single–ended
operation, Q1 and Q2 may be connected in parallel, and the
output–mode pin must be tied to ground to disable the
flip–flop. The output frequency will now be equal to that of the
oscillator.
The TL494 has an internal 5.0 V reference capable of
sourcing up to 10 mA of load current for external bias circuits.
The reference has an internal accuracy of
±5.0%
with a
typical thermal drift of less than 50 mV over an operating
temperature range of 0° to 70°C.
For more information refer to Figure 3.
Output pulse width modulation is accomplished by
comparison of the positive sawtooth waveform across
capacitor CT to either of two control signals. The NOR gates,
which drive output transistors Q1 and Q2, are enabled only
when the flip–flop clock–input line is in its low state. This
happens only during that portion of time when the sawtooth
voltage is greater than the control signals. Therefore, an
increase in control–signal amplitude causes a corresponding
linear decrease of output pulse width. (Refer to the Timing
Diagram shown in Figure 2.)
The control signals are external inputs that can be fed into
the deadtime control, the error amplifier inputs, or the
feedback input. The deadtime control comparator has an
effective 120 mV input offset which limits the minimum output
deadtime to approximately the first 4% of the sawtooth–cycle
time. This would result in a maximum duty cycle on a given
output of 96% with the output control grounded, and 48% with
it connected to the reference line. Additional deadtime may
be imposed on the output by setting the deadtime–control
input to a fixed voltage, ranging between 0 V to 3.3 V.
Functional Table
Input/Output
Controls
Grounded
@ Vref
Output Function
Single–ended PWM @ Q1 and Q2
Push–pull Operation
Figure 3. Oscillator Frequency versus
Timing Resistance
fosc , OSCILLATOR FREQUENCY (Hz)
500 k
CT = 0.001
µF
VCC = 15 V
fout
fosc =
1.0
0.5
100 k
10 k
0.01
µF
The pulse width modulator comparator provides a means
for the error amplifiers to adjust the output pulse width from
the maximum percent on–time, established by the deadtime
control input, down to zero, as the voltage at the feedback pin
varies from 0.5 V to 3.5 V. Both error amplifiers have a
common mode input range from –0.3 V to (VCC – 2V), and
1.0 k
500
1.0 k 2.0 k 5.0 k
0.1
µF
10 k 20 k 50 k
100 k 200 k
RT, TIMING RESISTANCE (Ω)
500 k 1.0 M
MOTOROLA ANALOG IC DEVICE DATA
5
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