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A Comparison of Various Bipolar
Transistor Biasing Circuits
An up-to-date review of bias techniques
By Al Ward and Bryan Ward
Agilent Technologies
he bipolar junction transistor (BJT) is
often used as a low noise amplifier in cel-
lular, PCS and pager applications because
of its low cost. With a minimal number of exter-
nal matching networks, the BJT can produce an
LNA with RF performance considerably better
than an MMIC. Of equal importance is the DC
performance. Although the device’s RF perfor-
mance may be quite closely controlled, the vari-
ation in device DC parameters can be quite sig-
nificant because of normal process variations.
It is not unusual to find a 2 or 3 to 1 ratio in
device
h
FE
. Variation in
h
FE
from device to
device will generally not appear as a difference
in RF performance. In other words, two devices
with widely different
h
FE
can have similar RF
performance, as long as the devices are biased at
the same
V
CE
and
I
C
. The primary purpose of
the bias network is to keep
V
CE
and
I
C
constant
as DC parameters vary from device to device.
The bias circuitry is often overlooked because
of its apparent simplicity. With a poorly
designed fixed bias circuit, the variation in
I
C
from lot to lot can have the same maximum to
minimum ratio as the
h
FE
variation from lot to
lot. If there is no compensation
I
C
will double
when
h
FE
is doubled. It is the task of the DC
bias circuit to maximize the circuit’s tolerance
to
h
FE
variations. In addition, transistor para-
meters can vary over temperature causing a
drift in
I
C
at temperature. The low power supply
voltages typically available for handheld appli-
cations also make it more difficult to design a
temperature stable bias circuit.
One solution to the biasing dilemma is the
use of active biasing. Active biasing often makes
use of an IC or a PNP transistor and a variety of
resistors, effectively setting
V
CE
and
I
C
regard-
T
less of variations in device
h
FE
. Although the
technique of active biasing would be the best
choice for control of device to device variability
and over temperature variations, associated
costs are usually high.
Other biasing options include various forms
of passive biasing. This article discusses various
passive biasing circuits, including their advan-
tages and disadvantages.
Various BJT passive bias circuits
Passive biasing schemes usually consist of
two to five resistors properly arranged about the
transistor. Various passive biasing schemes are
shown in Figure 1. The simplest form of passive
biasing is shown as Circuit #1 in Figure 1. The
collector current
I
C
is simply
h
FE
times the base
current
I
B
. The base current is determined by
the value of
R
B
. The collector voltage
V
CE
is
determined by subtracting the voltage drop
across resistor
R
C
from the power supply volt-
age
V
CC
. As the collector current is varied, the
V
CE
will change based on the voltage drop across
R
C
. Varying
h
FE
will cause
I
C
to vary in a fairly
direct manner. For constant
V
CC
and constant
V
BE
,
I
C
will vary in direct proportion to
h
FE
. For
example, as
h
FE
is doubled, collector current,
I
C
,
will also double. Bias circuit #1 provides no
compensation for variation in device
h
FE
.
Bias circuit #2 provides voltage feedback to
the base current source resistor
R
B
. The base
current source is fed from the voltage
V
CE
, as
opposed to the supply voltage
V
CC
. The value of
the base bias resistor
R
B
is calculated based
upon nominal device
V
BE
and the desired
V
CE
.
Collector resistor
R
C
has both
I
C
and
I
B
flowing
through it.
The operation of this circuit is best explained
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v
Figure 1(a). Circuit #1: nonsta-
bilized BJT bias network.
v
Figure 1(b). Circuit #2: voltage
feedback BJT bias network.
v
Figure 1(c). Circuit #3: voltage feed-
back with current source BJT bias net-
work.
exception that the series current source
resistor
R
B
is omitted. This circuit is
seen in bipolar power amplifier design
R
B1
with resistor
R
B2
replaced by a series sil-
icon power diode providing temperature
compensation for the bipolar device. The
current flowing through resistor
R
B1
is
shared by both resistor
R
B2
and the base
R
B2
R
e
emitter junction
V
BE
. The greater the
current through resistor
R
B2
, the
greater the regulation of the base emit-
ter voltage
V
BE
.
v
Figure 1(d). Circuit #4: voltage
v
Figure 1(e). Circuit #5: emitter
Bias circuit #5 is the customary text-
feedback with voltage source BJT
feedback BJT bias network.
book circuit for biasing BJTs. A resistor
bias network.
is used in series with the device emitter
lead to provide voltage feedback. This
circuit ultimately provides the best con-
as follows. An increase in
h
FE
will tend to cause
I
C
to trol of h
FE
variations from device to device and over tem-
increase. An increase in
I
C
causes the voltage drop perature. The disadvantage of this circuit is that the
across resistor
R
C
to increase. The increase in voltage emitter resistor must be properly bypassed for RF. The
across
R
C
causes
V
CE
to decrease. The decrease in
V
CE
typical bypass capacitor often has internal lead induc-
causes
I
B
to decrease because the potential difference tance which can create unwanted regenerative feedback.
across base bias resistor
R
B
has decreased. This topolo- The feedback can create device instability. Despite the
gy provides a basic form of negative feedback which problems associated with using the emitter resistor
tends to reduce the amount that the collector current technique, this biasing scheme generally provides the
increases as
h
FE
is increased.
best control on
h
FE
and over temperature variations.
Bias circuit #3 has been discussed in past literature
The sections that follow begin with a discussion of the
but predominately when very high
V
CC
(> 15 volts) and BJT model and its temperature dependent variables.
V
CE
(> 12 volts) were used [1]. The voltage divider net- From the basic model, various equations are developed
work consisting of
R
B1
and
R
B2
provide a voltage divider to predict the device’s behavior over
h
FE
and tempera-
from which resistor
R
B
is connected. Resistor
R
B
then ture variations. This article is an update to the original
determines the base current.
I
B
times
h
FE
provides
I
C
. article written by Kenneth Richter of Hewlett-Packard
The voltage drop across
R
C
is determined by the collec- [2] and Hewlett-Packard Application Note 944-1 [3].
tor current
I
C
, the base current
I
B
and the current con-
sumed by the voltage divider, consisting of
R
B1
and
R
B2
.
BJT modeling
This circuit provides similar voltage feedback to that of
The BJT is modeled as two current sources, as shown
bias circuit #2.
in Figure 2. The primary current source is
h
FE
I
B
. In par-
Bias circuit #4 is similar to bias circuit #3 with the allel is a secondary current source
I
CBO
(1+
h
FE
) that
V cc
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R
B1
I
BB
+ I
B
V
BB
I
C
V
CC
R
B
R
C
B
I
B
C
I
BB
V
BE
h
ie
h
FE
I
B
V
CE
I
CBO
(1+h
FE
)
R
C
V'
BE
V
BE
R
B2
V
CC
E
v
Figure 2. Gummel-Poon model of BJT with voltage feed-
back and constant base current source network.
describes the leakage current flowing through a reverse
biased PN junction.
I
CBO
is typically 1
×
10
–7
A at 25
degrees C for an Agilent Technologies HBFP-0405 tran-
sistor.
V'
BE
is the internal base emitter voltage with
h
ie
representing the equivalent Hybrid PI input impedance
of the transistor.
h
ie
is also equal to
h
FE
/λI
C
where
λ
=
40 at +25 degrees C.
V
BE
will be defined as measured
between the base and emitter leads of the transistor. It
is equivalent to
V'
BE
+
I
B
h
ie
.
V
BE
is approximately 0.78
volts at 25 degrees C for the HBFP-0405 transistor.
The device parameters that exhibit the greatest
change as temperature is varied are
h
FE
,
V'
BE
, and
I
CBO
.
These temperature dependent variables have character-
istics which are process dependent and fairly well under-
stood.
h
FE
typically increases with temperature at the
rate of 0.5 percent/degrees C.
V'
BE
has a typical negative
temperature coefficient of –2 mV/degrees C. This indi-
cates that
V
BE
decreases 2 mV for every degree increase
in temperature.
I
CBO
typically doubles for every 10
degree C rise in temperature. Each one of these para-
meters contributes to the net resultant change in collec-
tor current as temperature is varied.
For each bias network shown in Figure 1, several sets
of simplified circuit equations have been generated to
allow calculation of the various bias resistors. These are
shown in Figures 3, 4, 5, 6 and 7. Each of the bias resis-
tor values are calculated based on various design para-
meters such as desired
I
C
,
V
CE
, power supply voltage
V
CC
and nominal
h
FE
.
I
CBO
and
h
ie
are assumed to be zero for
the basic calculation of resistor values.
Additional information, usually provided by the
designer, is required for the three circuits that use the
voltage divider consisting of
R
B1
and
R
B2
. For the bias
network that uses voltage feedback with current source,
the designer must choose the voltage across
R
B2
(V
RB2
)
and the bias current through resistor
R
B2
, which will be
termed
I
RB2
. If
V
CE
>
V
RB2
>
V
BE
, then a suggested
V
RB2
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Figure 3. Equations for nonstabilized bias network.
R
B
R
C
V
CC
R
B
=
V
CE
V
BE
I
B
R
C
=
V
CC
V
CE
I
C
+
I
B
.
.
I
C
= h
FE
(
V
CC
V
BE
)
+
I
CBO
(1
+
h
FE
)
.
(
h
ie
+
R
B
+
R
C
)
I
h
ie
R
B
R
C
.
(1
+
h
FE
)
v
Figure 4. Equations for voltage feedback bias network.
would be 1.5 volts and a suggested
I
RB2
would be 10 per-
cent of
I
C
, or 0.5 mA.
The voltage feedback with a voltage source network
and the emitter feedback network also require that the
designer choose
I
RB2
. The ratio of
I
C
to
I
RB2
can play a
major role in bias stability.
An equation was then developed for each circuit that
calculates collector current,
I
C
, based on nominal bias
resistor values and typical device parameters, including
h
FE
,
I
CBO
, and
V'
BE
. MATHCAD 7 was used to help
develop the
I
C
equation. Although the
I
C
equation
begins simply, it develops into a rather lengthy equation
R
B1
R
C
V
CC
R
B
=
V
RB
2
V
BE
I
B
V
CE
V
RB
2
I
B
2
+
I
B
R
C
=
V
CC
V
CE
I
C
+
I
B
2
+
I
B
V
RB
2
I
B
2
R
B
R
B
1
=
R
B
2
=
Designer must choose I
B2
and V
RB2
such that V
CE
>V
RB2
>V
BE
R
B2
I
C
=
V
BE
.
(
R
B
1
+
R
B
2
+
R
C
)
R
B
2
.
[
R
C
.
I
CBO
.
(1
+
h
FE
)
V
CC
]
(
R
B
+
h
ie
)
.
(
R
B
1
+
R
B
2
+
R
C
)
+
R
B
2
(
h
FE
R
C
+
R
C
+
R
B
1
)
h
FE
+
I
CBO
(1
+
h
FE
)
v
Figure 5. Equations for voltage feedback with current source bias network.
for some of the more complicated circuits. MATHCAD
helped to simplify this task.
Design example using the Agilent HBFP-0405 BJT
The HBFP-0405 transistor is used as a test example
for each of the bias circuits. The HBFP-0405 is described
in [4] as a low noise amplifier for 1800 to 1900 MHz
applications. The HBFP-0405 will be biased at a
V
CE
of
2.7 volts and a drain current
I
C
of 5 mA. A power supply
voltage of 3 volts will be assumed. The nominal
h
FE
of
the HBFP-0405 is 80. The minimum is 50 while the max-
imum is 150. The calculated bias resistor values for each
bias circuit are described in Table 1.
With the established resistor values,
I
C
is calculated
based on minimum and maximum
h
FE
. The perfor-
mance of each bias circuit with respect to
h
FE
variation
is shown in Table 2. Bias circuit #1 clearly has no com-
pensation for varying
h
FE
, allowing
I
C
to increase 85
percent as
h
FE
is taken to its maximum. Circuit #2 with
very simple collector feedback offers considerable com-
pensation due to
h
FE
variations allowing an increase of
only 42 percent. Circuit #3 offers very little improve-
ment over circuit #2. Circuit #4 provides considerable
improvement in
h
FE
control by only allowing a 9 percent
R
C
V
CC
R
B1
increase in
I
C
. Circuit #4 offers an improvement over
the previous circuits by providing a stiffer voltage source
across the base emitter junction. As we will see later,
this circuit has worse performance over temperature as
compared to circuits #2 and #3. However, when both
h
FE
and temperature are considered, circuit #4 will
appear to be the best performer for a grounded emitter
configuration. As expected, circuit #5 provides the best
control on
I
C
with varying
h
FE
allowing only a 5.4 per-
cent increase in
I
C
. Results are power supply dependent,
and with higher
V
CC
, results may vary significantly.
BJT performance over temperature
Since all three temperature dependent variables
(I
CBO
,
h
FE
and
V'
BE
) exist in the
I
C
equation, differenti-
ating the
I
C
equation with respect to each of the para-
meters provides insight into their effect on
I
C
. The par-
tial derivative of each of the three parameters repre-
sents a stability factor. The various stability factors and
their calculation are shown in Table 3. Each circuit has
three distinctly different stability factors which are then
multiplied times a corresponding change in either
V'
BE
,
h
FE
, or
I
CBO
and finally summed. These changes or
deltas in
V'
BE
,
h
FE
, and
I
CBO
are calculated based on
R B2
V BE
I B2
V CE
IB
RC
I B2 . R B2
I B2
V CC
IC
IB
V CE
I B2
R B1
R
B2
Designer must choose IB2
RC
IC
hFE
.
.I
C B O RC I C B O
RC
R B2
.V·
BE
RC
RB 2 . h F E
.h .I
ie C B O
R B1
.I
.
.h .I
ie C B O
C B O RB 1 I
C B O
R B2
hF E
RC
RC
hF E
RC
RB 2 F E
.h
.h
R B1
ie
hF E
RC
R B1
R B2
.V·
BE
.h
R B1
RB 2 . hF E
ie
.h .I
ie C B O
R B1
1 . .
.h .I
h ie I C B O h ie . IC B O V C C
ie C B O V· B E
RB2
hFE
R B1
RB 2 . hF E
1 .
h ie
hF E
v
Figure 6. Equations for voltage feedback with voltage source bias network.
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V
cc
R
B1
Pick
I
B2
to be 10 percent of
I
C
, which is equal to .0005 A
R
B2
R
E
E
_
IC
V·B E
h
1 . .
hi e I
h i e. I
RE
.I
hF E
RE .I
1 .
h
hF E
R1
R2
ie
. V·
BE
RE
R1
R2 . hF E
RE
.h .I
ie
.h
R1
R2
ie
.h .I
ie
R1 RE
.
.I
R 2 hF E
R1
hF E
R1
R2
.R .I
E
.I
hFE
R1
R 1. I
VC C
R1
R2. h F E
hF E
R1 RE R1
.
.R
E
R2 hF E R 2
v
Figure 7. Equations for emitter feedback bias network.
variations in these parameters based on the manufac-
turing processes.
A comparison of each circuit’s stability factors will
certainly provide insight as to which circuit compen-
sates best for each parameter. MATHCAD was again
used to calculate the partial derivatives for each desired
stability factor. The stability factors for bias circuit #1
are shown in Table 4. The stability factors for the
remaining circuits are shown in the Appendix.
The change in collector current from the nominal
design value at 25 degrees C is then
Resistor
Non-
Voltage
Voltage
Voltage
Emitter
calculated by taking each stability
Stabilized
Feedback
Feedback
Feedback Feedback
factor and multiplying it times the
Bias
Bias Network with Current with Voltage
Bias
corresponding change in each para-
Network
Source Bias Source Bias Network
meter. Each product is then summed
Network
Network
to determine the absolute change in
R
c
140
138
126
126
collector current.
R
B
30770
19552
11539
As an example, the collector cur-
R
B1
889
2169
2169
rent of the HBFP-0405 will be ana-
R
B2
3000
1560
2960
lyzed as temperature is increased
R
E
138
from +25 degrees C to +65 degrees
v
Table 1. Bias resistor values for HBFP-0405 biased at
V
CE
= 2 volts,
V
CC
= 2.7
C. For the HBFP-0405,
I
CBO
is typi-
volts,
I
C
= 5 mA,
h
FE
= 80 for the various bias networks.
cally 100 nA at +25 degrees C and
typically doubles for every 10
degrees
C
temperature
rise.
Bias Circuit
Non-
Voltage
Voltage
Voltage
Emitter
Therefore,
I
CBO
will increase from
Stabilized
Feedback
Feedback
Feedback Feedback
100 nA to 1600 nA at +65 degrees C.
Bias
Bias Network with Current with Voltage
Bias
The difference or
I
CBO
will be 1600
Network
Source Bias Source Bias Network
– 100 = 1500 nA. The 1500 nA will
Network
Network
then be multiplied times its corre-
I
c
(mA)@
3.14
3.63
3.66
4.53
4.70
sponding
I
CBO
stability factor.
minimum
h
FE
V'
BE
at 25 degrees C was measured
I
c
(mA)@
5.0
5.0
5.0
5.0
5.0
at 0.755 volts for the HBFP-0405.
typical
h
FE
Since
V'
BE
has a typical negative tem-
I
c
(mA)@
9.27
7.09
6.98
5.44
5.27
perature coefficient of –2 mV per
maximum
h
FE
degree C,
V'
BE
will be 0.675 volts at
Percentage
+85%
+42%
+40%
+9%
+5.4%
+65 degrees C. The difference in
V'
BE
change in
I
c
–37%
–27%
–27%
–9%
–6%
will then be 0.675 – 0.755 = –0.08
from nominal
I
c
volts. The –0.08 volts will then be
v
Table 2. Summary of
I
C
variation versus h
FE
for various bias networks for the
multiplied by its corresponding
V'
BE
HBFP-0405,
V
CC
= 2.7 volts,
V
CE
= 2 volts,
I
C
= 5 mA,
T
j
= +25 degrees C.
stability factor.
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